1. Field of the Invention
This invention relates to the fabrication of self-aligned bipolar transistors, and more particularly to a transistor and associated fabrication process in which an extrinsic base is doped by thermally driving in dopant from an overlying doped contact.
2. Description of the Related Art
A standard process for fabricating high performance bipolar transistors, commonly referred to as the "self-aligned double poly" process, is described in Ning et al., "Self-Aligned Bipolar Transistors for High-Performance and Low-Power-Delay VLSI", IBM Research Report, Nov. 17, 1980, pages 1-14, which improves upon the prior method described in U.S. Pat. No. 4,157,269 to Ning et al. In this process the emitter region is self-aligned to a polysilicon ("poly") base contact, resulting in a small emitter-to-base contact separation and a low collector-to-emitter area ratio. With this process, however, the silicon wafer's surface tends to become damaged due to either an etch process used in the fabrication sequence, or to a sacrificial poly oxidation that is performed. The damaged or non-flat wafer surface reduces the reproducibility of the device's performance, and in some cases can degrade the chip yield.